Hardware / NVIDIA Grace Blackwell · GB10 (product GX10)
DGX Spark · NVIDIA GB10
A Blackwell GPU sharing 128 GB of memory with a 20-core Arm CPU. Coppelius trains here through the compiler's sm_121 back end.
AArch64 host · Blackwell compute capability 12.1
What has run here
Qualified
Coppelius trains, resumes and predicts here, including runs of 10,000 steps (25–26 Sep 2026). Its sm_86 kernels are lowered to sm_121 by the compiler; nothing is tuned for this GPU yet. Vathek's short training runs also pass here.
Driver facts
Typed profile
Read at build time from Platform.DGXSpark.Profile at 2877a0c1. Systems bind to these values by name; none branches on a card name.
| Fact | Value | Alpha definition |
|---|---|---|
| Profile identity | dgx-spark-bringup-v1 | dgxSparkProfileIdentity |
| Performance cores | 10 × Cortex-X925 | dgxSparkPerformanceCoreCount |
| Efficiency cores | 10 × Cortex-A725 | dgxSparkEfficiencyCoreCount |
| Unified memory | 130,596,048,896 B (121.6 GiB) | dgxSparkTotalMemory |
| Page size | 4096 B | dgxSparkPageSize |
| Level 2 cache | 26,214,400 B (25 MiB) | dgxSparkLevel2Cache |
| Level 3 cache | 25,165,824 B (24 MiB) | dgxSparkLevel3Cache |
| Accelerator compute capability | 12.1 | dgxSparkDeviceComputeMajor / Minor |
Profile coverage
What has been measured, and what has not
A fully profiled device has three tiers. A tier that is not measured yet lists the fields it will fill, so the gap is explicit.
- 1
Driver facts
LiveWhat the host reports: core parts and counts, unified memory, page size, caches, and the GPU's compute capability.
- ARM implementer and core parts
- core counts
- unified memory
- page size
- L2 / L3 cache
- GB10 compute capability
- 2
Micro-benchmarks
First readingMeasured instruction and memory behaviour. Copy bandwidth by memory kind has been measured here (below); instruction-level costs have not.
- issue rate and latency per typed instruction (FFMA, IMAD, MUFU, LDG, STG, LDSM, HMMA…)
- shared-memory bandwidth and bank behaviour
- global-memory bandwidth by access pattern and width
- tensor-core throughput at 16×8×16
- barrier and warp-shuffle cost
- submission, doorbell and semaphore round-trip cost
- sustained clocks under the training workload
- 3
Model-shaped calibration
First readingThe cost of the exact executables Alpha emits for each system on this device. End-to-end throughput and per-launch device times from the GPU's own timestamps exist (below); occupancy and register pressure have not been measured.
- per-kernel time for every launch in each system's schedule
- occupancy and register / shared-memory pressure per kernel
- end-to-end step time and its split between host protocol, launches and waits
- memory footprint against the profile's video memory
Measured on this card · 2026-09-26
Measured readings
From the run record. These measure Alpha's current executables on this card, not the card's limits.
| Reading | Value |
|---|---|
| One Coppelius training step (866 launches, run 21) | 45.35 ms on the device's own clock |
| Copy bandwidth, L2-resident, GPU-cached memory | 737–774 GB/s |
| Copy bandwidth, DRAM-sized | 225–235 GB/s |
| 10,000-step runs | Per-step losses and final checkpoints byte-identical across runs 19–21 |
Sources