FCMP Sn, Sm: 0001 1110 0 01 Rm 001000 Rn 00000. The Rd field is zero -- the
comparison writes NZCV, not a register -- and bits 10-15 are 001000, which
is the 32 in byte 1. This is the QUIET compare, the counterpart of the
SSE lowering's `ucomiss`: a quiet NaN does not raise Invalid, only a
signalling one does. `fcmpe` would be the signalling form and is not what
the x86 lane does.
1048def aarch64FloatCompareWord =
1049 (lambda unrestricted left : (family AArch64FloatRegister) .
1050 (lambda unrestricted right : (family AArch64FloatRegister) .
1051 (aarch64ByteWord
1052 (aarch64FloatRnByte0 left)
1053 (naturalAdd aarch64ThirtyTwo (aarch64FloatRnByte1 left))
1054 (naturalAdd aarch64ThirtyTwo (aarch64FloatRegisterCode right))
1055 30)))The compiler supplied declaration spans and resolved links from this source snapshot. This page does not assert that this file belongs to a checked closure.