Runtime.NativePhysicalImagePlan

Wire layout is a compiler decision, separate from the host command semantics. Both formats have a 176-byte header. A record is eight header words, its operand slots (24 bytes each, at most seven), then payload, auxiliary bytes and error identity. V4 (ALPXPHY4 / 4, the x86-64 host) is compact: a record stores its operand slots only up to the last one that is not the zero immediate, and header word 7 holds the bytes it omitted (0, 24, ..., 168). A slot it does not store reads as the zero immediate, so trimming never changes a value: recordExtent = 232 - omitted + payloadExtent + auxiliaryExtent + errorExtent and the payload begins at byte 232 - omitted. V3 (ALPXPHY3 / 3, AArch64) stores all seven slots (word 7 is 0) and adds zero padding AFTER the error identity so inline machine routines can execute on an ISA with aligned instruction fetch: recordExtent = roundUp(232 + payloadExtent + auxiliaryExtent + errorExtent, 4) The image base must itself be aligned. Compiler.ELF plus the AArch64 assembler establish this for the maintained host. In both, the three content extents retain their exact meaning; padding is never a syscall payload, copied data, telemetry field or diagnostic identity. The reader checks the extent before dispatch and advances by it. Shared routine code (both formats): a machine routine whose code repeats an earlier routine's exactly, and which passes no operand into its own payload, stores a one-instruction branch to that earlier code instead of a copy (x86 jmp rel32, AArch64 B). The interpreter calls it like any routine; the branch reaches the same code with the same registers and return address. V4 readers must reject V3 and vice versa.

35family NativePhysicalImageFormat : Type 0
36constructor NativePhysicalImageCompactV4
37constructor NativePhysicalImageAlignedV3