Source/Packages

Accelerator.SM121.Lowering

packages/hardware/architectures/nvidia-sm121/src/Accelerator/SM121/Lowering.alpha

2,621 lines365 declarations134.1 KiBSHA-256 b7b3bbc05e9c

def · lines 1422–1422

sm121LowerBranchOffsetPlace

Full file
A branch's displacement. SM86's BRA holds the byte displacement from the next instruction, 50 bits in two's complement: bits 32..63 of the low word, then bits 0..17 of the high word (Accelerator.SM86's encoder writes the offset word and its sign-extending descriptor there). sm_121 moves the same displacement, counted in words of 4 bytes (E = D / 4, 56 bits): E's low 8 bits to bits 16..23, its next 30 to bits 34..63 and the rest to bits 0..17 of the high word -- read off ptxas -arch=sm_121a's BRA against nvdisasm's label addresses on the DGX Spark, 2026-09-26. An SM86 word passed through unchanged branches 256 times too far on sm_121.
1422def sm121LowerBranchOffsetPlace : Nat = sm121LowerHalfWordSpan

The compiler supplied declaration spans and resolved links from this source snapshot. This page does not assert that this file belongs to a checked closure.