Source/Packages

Accelerator.SM121.Lowering

packages/hardware/architectures/nvidia-sm121/src/Accelerator/SM121/Lowering.alpha

2,621 lines365 declarations134.1 KiBSHA-256 b7b3bbc05e9c

family · lines 161–172

SM121LowerRule

Full file
How an SM86 instruction is lowered.
161family SM121LowerRule : Type 0
162-- its SM86 word
163constructor SM121LowerRuleSame
164constructor SM121LowerRuleConstantMove
165constructor SM121LowerRuleConstantMultiplyAdd
166constructor SM121LowerRuleConstantMultiplyAddWide
167constructor SM121LowerRuleReduction
168constructor SM121LowerRuleShared
169constructor SM121LowerRuleSharedMatrix
170-- LDGSTS: its shared offset rebased, its descriptor bits sm_121's
171constructor SM121LowerRuleAsyncCopy
172constructor SM121LowerRuleBranch

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