Source/Packages

Accelerator.SM121.Lowering

packages/hardware/architectures/nvidia-sm121/src/Accelerator/SM121/Lowering.alpha

2,621 lines365 declarations134.1 KiBSHA-256 b7b3bbc05e9c

family · lines 74–92

SM121LowerOp

Full file
74family SM121LowerOp : Type 0
75constructor SM121LowerOpValue
76field unrestricted sm121LowerOpLow : Nat
77field unrestricted sm121LowerOpHigh : Nat
78field unrestricted sm121LowerOpClass : (family SM121LowerClass)
79field unrestricted sm121LowerOpReads : (family SM121LowerRegisters)
80field unrestricted sm121LowerOpWrites : (family SM121LowerRegisters)
81field unrestricted sm121LowerOpPredicateReads : (family SM121LowerRegisters)
82field unrestricted sm121LowerOpPredicateWrites : (family SM121LowerRegisters)
83field unrestricted sm121LowerOpConstantLoad : Nat
84-- the SM86 instruction's index + 1 on the first op it lowers to (0 on the
85-- others and on inserted ops): where a branch to it lands
86field unrestricted sm121LowerOpLabel : Nat
87-- 1 on a branch and on the first op of a branch's target: a join, where the
88-- schedule is drained (every result ready, every scoreboard a register rides
89-- on waited) so that every path arrives with no register in flight
90field unrestricted sm121LowerOpJoin : Nat
91-- a branch's target's SM86 index + 1 (0 on every other op)
92field unrestricted sm121LowerOpTarget : Nat

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