Source/Packages

Accelerator.SM86.InstructionEncoding

packages/hardware/architectures/nvidia-sm86/src/Accelerator/SM86/InstructionEncoding.alpha

2,478 lines168 declarations99.8 KiBSHA-256 b7c60128ad15

def · lines 782–807

sm86EncodeFloat64Binary

Full file
Register-form DADD/DMUL, with RNE and no implicit contraction. Source facts: Mesa NAK sm70_encode.rs at 61a2e907f1d6e4a8432d91d0fde5d439a875fbbe, OpDAdd/OpDMul and encode_alu_base (upstream mirror): https://chromium.googlesource.com/external/gitlab.freedesktop.org/mesa/mesa/+/61a2e907f1d6e4a8432d91d0fde5d439a875fbbe/src/nouveau/compiler/nak/sm70_encode.rs Addition's right operand occupies src2; multiplication uses src1. Subtraction negates src2. These encodings still require separate physical qualification.
782def sm86EncodeFloat64Binary =
783  (lambda unrestricted guard : (family SM86InstructionGuard) .
784    (lambda unrestricted operation : (family SM86Float64Operation) .
785      (lambda unrestricted destination : (family SM86RegisterPair) .
786        (lambda unrestricted left : (family SM86RegisterPair) .
787          (lambda unrestricted right : (family SM86RegisterPair) .
788            (lambda unrestricted control : (family SM86Control) .
789              (let unrestricted encode =
790                (lambda unrestricted opcode : Nat .
791                  (lambda unrestricted rightAt : Nat .
792                    (lambda unrestricted negate : Nat .
793                      (sm86EncodeInstructionFields opcode guard control
794                        (sm86InstructionPrependField 16 8 (sm86RegisterPairIndex destination)
795                          (sm86InstructionPrependField 24 8 (sm86RegisterPairIndex left)
796                            (sm86InstructionPrependField rightAt 8 (sm86RegisterPairIndex right)
797                              (sm86InstructionOneField 75 1 negate)))))))) in
798                (nat-eliminate (lambda unrestricted valid : Nat . (family SM86InstructionEncodingResult))
799                  (sm86InstructionUnsupported 64)
800                  (lambda unrestricted predecessor : Nat .
801                    (lambda unrestricted ignored : (family SM86InstructionEncodingResult) .
802                      (eliminate SM86Float64Operation
803                        (lambda unrestricted value : (family SM86Float64Operation) . (family SM86InstructionEncodingResult)) operation
804                        (branch SM86Float64Add . (encode 0x229 64 0))
805                        (branch SM86Float64Subtract . (encode 0x229 64 1))
806                        (branch SM86Float64Multiply . (encode 0x228 32 0)))))
807                  (sm86Float64RegistersAdmitted destination left right)))))))))

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