Source/Packages

Accelerator.SM86.InstructionEncoding

packages/hardware/architectures/nvidia-sm86/src/Accelerator/SM86/InstructionEncoding.alpha

2,478 lines168 declarations99.8 KiBSHA-256 b7c60128ad15

def · lines 812–824

sm86EncodeFloatConvert

Full file
F2F register form, src at bits 32..39, width codes log2(bytes), RNE at 78..79 and FTZ at 80 both zero. Source: OpF2F and encode_alu_base, Mesa revision 61a2e907f1d6e4a8432d91d0fde5d439a875fbbe (link above).
812def sm86EncodeFloatConvert =
813  (lambda unrestricted guard : (family SM86InstructionGuard) .
814    (lambda unrestricted conversion : (family SM86FloatConversion) .
815      (lambda unrestricted control : (family SM86Control) .
816        (nat-eliminate (lambda unrestricted valid : Nat . (family SM86InstructionEncodingResult))
817          (sm86InstructionUnsupported 65)
818          (lambda unrestricted predecessor : Nat . (lambda unrestricted ignored : (family SM86InstructionEncodingResult) .
819            (sm86EncodeInstructionFields 0x310 guard control
820              (sm86InstructionPrependField 16 8 (sm86RegisterNatural (sm86FloatConversionDestination conversion))
821                (sm86InstructionPrependField 32 8 (sm86RegisterNatural (sm86FloatConversionSource conversion))
822                  (sm86InstructionPrependField 75 2 (sm86FloatConversionDestinationSize conversion)
823                    (sm86InstructionOneField 84 2 (sm86FloatConversionSourceSize conversion))))))))
824          (sm86FloatConversionAdmitted conversion)))))

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