Source/Packages

Accelerator.SM86.Operands

packages/hardware/architectures/nvidia-sm86/src/Accelerator/SM86/Operands.alpha

715 lines54 declarations60.7 KiBSHA-256 6afcbdc0de22

def · lines 610–610

sm86BarrierSetCycles

Full file
A scoreboard barrier as a hazard key: 300 + its number (SB0 .. SB5). An instruction that sets one (write or read barrier) makes it pending sm86BarrierSetCycles after issue -- ASSUMED, like the table above: a waiter issued sooner could miss it -- and an instruction whose wait mask names it reads it.
610def sm86BarrierSetCycles : Nat = 2

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