Source/Packages

Realization.Nvidia.SM86.AdamWHalfSM86

packages/realizations/cooperative/nvidia-sm86/src/Realization/Nvidia/SM86/AdamWHalfSM86.alpha

428 lines73 declarations26.3 KiBSHA-256 9692515bc485

def · lines 227–228

ahwValue

Full file
---- several quads a thread in flight (side warps) ---- `wide` quads a thread an iteration: T, T + S, .., T + (wide - 1) S (S the threads), every bank's loads issued before any update, so a thread keeps `wide` times the bytes in flight -- what a side warp, a few to an SM, needs to stream at the memory's rate. Each element's update is ahUpdate's instructions (ahWideUpdate), its quad's stores ahStores'. Registers: quad q's banks at 32 + 16 q + 4 b + e, the temporaries after the last quad's (shared: the updates run one after another), each quad's half pairs after those; quad q's guard P0 (q 0) or P(q + 1) (P1 counts the loop). At most four quads (P2..P4).
227def ahwValue = (lambda unrestricted q : Nat . (lambda unrestricted e : Nat . (lambda unrestricted b : Nat .
228  (naturalAdd 32 (naturalAdd (naturalMultiply 16 q) (naturalAdd (naturalMultiply 4 b) e))))))

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