Realization.Nvidia.SM86.StallCompaction

Ampere can read a variable-latency instruction's source registers after issue. The RTX 3090 attention-key LDG overwrote its address before that late read and faulted (c28712e8, driver 580.126.20). On that card, SB5 as the read barrier and an SB5 wait on every instruction completed a full one-step update and checkpoint. This serial form is a conservative repair for a schedule the scoreboard refuses; the caller preserves already accepted schedules. The stall compactor below restores the shortest schedule admitted by the fixed-latency model. A more precise register liveness scheduler needs its own card qualification before replacing it.

62def sm86ReadBarrierWait =
63  (lambda unrestricted barrier : (family SM86Barrier) .
64    (eliminate SM86Barrier (lambda unrestricted current : (family SM86Barrier) . Byte) barrier
65      (branch SM86Barrier0 . (byte 1)) (branch SM86Barrier1 . (byte 2))
66      (branch SM86Barrier2 . (byte 4)) (branch SM86Barrier3 . (byte 8))
67      (branch SM86Barrier4 . (byte 16)) (branch SM86Barrier5 . (byte 32))
68      (branch SM86Barrier6 . (byte 0)) (branch SM86BarrierNone . (byte 0))))